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Advanced Audio Recording

A Virtual Analog Oscillator in VHDL for FPGAs

This page shows a complex virtual analog oscillator modeled with mathematical equations to be realized in a FPGA. Read the former article about the oscillator in the PLD.


self oscillating circuit with damping

The oscillator consists of two accumulators with forward and feedback paths using optimized scaling factors. The adders accumulate the pre scaled values and work as integrators. The first one represents the velocity and the second one the wave value itself which is used to feed the multiplier for the inverted acceleration. The resulting equations for this case are a classical differential equation system and lead to a sine wave - the well known solution for those mechanical and electrical systems. Integer calculation and precise rounding techniques will have to be applied to get a sufficient accuracy and avoid issues.


virtual analog oscillation circuit in verilog and vhdl

With this circuit a permanently running oscillator is realized if feedback factors are set properly to get a stable system. The resulting frequency and amplitude are implicitly given and can be indirectly controlled in that way, that the multiplier values are changed. To switch it on or modify the output level, the final multiplier stage is used as a gate. It also compensates the variation of the amplitude with the frequency. The detailed values including a certain offset for both velocity and amplitude will depend on the starting conditions. Noise is added to cause analog dirt and perform noise shaped rounding. Feedback is used for both volume level and square velocity which performs first order damping and BIAS removal as well as a slight second order damping. Compared to the former version, the noise shaping is done with improved noise generators using counters with optimized non binary lengths and progressing steps as well as individual bit swapping.


a real oscillating analog circuit

 The last step is to add a noise based rounding for the second order feedback and a trigger path to start and stop the oscillator by feeding it with virtual energy. Also the amplitude control is automatically set by the frequency here to have a stable output which is independently from the frequency setting.

a virtual analog realistic oscillatior circuit in vhdl 

Damping parameters are optimized that way that the energy feed does not lead to a permanently increasing amplitude but will grow with decreased difference and reach a steady state after some seconds.


 Read the article about the former Virtual Analog Oscillator


© 2004 J.S.