A
VHDL-implementation of my cyclic
synthesis algorithm is used
for FM-like sound synthesis in my
audio
DSP. Unlike the C/ASM-version the chaining of
the module is
variable so the sequence can be exchanged.
Up to 6 FM-modules are used to emulate the typical
FM-modulator chain known from
Yamaha-DX-Synthesizers.
With the
Spartan FPGA @50 MHz, 1024 voices can be achieved @ 48kHz.
For best operation the sampling frequency should be shifted
to at least ratio 8 for 4 operators and ratio 16 for 8
operators. Due to limitation of the FPGA only 6
operators are available. The ADSR is controlled by my multi
stage envelope generator type 2.