Virtual Analog Synthesizer with Altera Cyclone II & NIOS - J.S. 2006 96khz.org
DSP 56302
Processor Clock 80 MHz
Clock Period 12,5 ns
CC t n f
Main Loop 104 1300 ns 1 48000 62,4 ms
Sample Ausgabe 34 425 ns 2 48000 40,8 ms
Channel Summation 56 700 ns 1 48000 33,6 ms
Audio DSP Loop 162 2025 ns 2 48000 194,4 ms
Synthesizer Loop 356 4450 ns 3 48000 640,8 ms
Serial Interface 176 2200 ns 1 9600 21,1 ms
User Interface 766 9575 ns 1 192 1,8 ms
Debug Interface 466 5825 ns 1 192 1,1 ms
996 ms
NIOS Altera Cyclone II
Processor Clock 50 MHz
Clock Period 20 ns
CC t n f
Main Loop 126 2520 ns 1 48000 121,0 ms
Sample Ausgabe 14 280 ns 2 48000 26,9 ms
Channel Summation 86 1720 ns 1 48000 82,6 ms
Audio DSP Loop 276 5520 ns 1 48000 265,0 ms
Synthesizer Loop 488 9760 ns 1 48000 468,5 ms
Serial Interface 88 1760 ns 1 9600 16,9 ms
User Interface 846 16920 ns 1 192 3,2 ms
Debug Interface 502 10040 ns 1 192 1,9 ms
986 ms
NIOS Altera Cyclone future
Processor Clock 120 MHz
Clock Period 8,333 ns
CC t n f
Main Loop 126 1050 ns 1 48000 50,4 ms
Sample Ausgabe 14 116,7 ns 2 48000 11,2 ms
Channel Summation 86 716,7 ns 1 48000 34,4 ms
Audio DSP Loop 276 2300 ns 2 48000 220,8 ms
Synthesizer Loop 516 4300 ns 3 48000 619,2 ms
Serial Interface 88 733,3 ns 1 9600 7,0 ms
User Interface 846 7050 ns 1 192 1,4 ms
Debug Interface 502 4183 ns 1 192 0,8 ms
945 ms
NIOS Altera Cyclone future
Processor Clock 390 MHz
Clock Period 2,564 ns
CC t n f
Main Loop 150 384,6 ns 1 48000 18,5 ms
Sample Ausgabe 20 51,28 ns 2 48000 4,9 ms
Channel Summation 100 256,4 ns 1 48000 12,3 ms
Audio DSP Loop 450 1154 ns 4 48000 221,5 ms
Synthesizer Loop 750 1923 ns 8 48000 738,5 ms
Serial Interface 90 230,8 ns 1 9600 2,2 ms
User Interface 900 2308 ns 1 192 0,4 ms
Debug Interface 600 1538 ns 1 192 0,3 ms
999 ms
 
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See the Platform for this synth