For music applications with DDS or jitter compensation it is often necessary to slightly change a frequency for some percentages or move clock edges. In digital domains it is not possible to resample the clock signal, because the period steps were too coarse.

This page shows a method for direct frequency tuning by adding short delays onto the signal. Performing this dynamically it is possible to change a given clock frequency by only a small percentage. Sub sample periods can be added this way.

The example shows a circuit initially being appropriate for up to 10 MHz to be realized in PLDs like Xilinx 3020. It was possible to change the frequency in 8 steps. With another device of the 4000-series I reached up to 40MHz. By adding a period step delay every 1000th clock cycle, the resulting frequency was >96,0001 Hz. 

By switching between the delayed clock signals the frequency is changed slightly, which can be done in smaller steps than the period of the sample clock would allow to do. This way DDS and other wave generation circuits can be tuned.

Conclusion

Classical DDS techniques might be enhanced by dynamic smoothed frequency control.