This project shows the newest
version of my Class-D amplifier circuit with an optimized
modulation to reduce the load on the transistors and save
thermal energy by combining pulse code modulation and pulse
density modulation. It is totally realized with generic
functions in VHDL.
Screen Shot of FPGA oscilloscope
An internal FPGA-based
oscilloscope is used to show the PDM-channels:
signal is the PCM-24bit from the input derived from S/PDIF.
A test signal with 5kHz + 15kHz is used to represent the
high frequency behaviour.
The blue channels are the 4
digital output channels performing PDM.
channel is the digital output as it shows up in the analog
electronic. It is resampled by a little ADC-module reading
back the S/PDIF data.
An Altera Cyclone II
from Terasic is used to implement the graphical
visualization of the synthesized audio via 4Bit-R2R-VGA.