Optimized Noise Generator in VHDL with Cyclone 2 FPGA

optimized noise generator in vhdl
	DNG V2	Dynamic Noise Generator with unpredictable results This is an extended version of my first implementation. Longer inverter chains are applied to met the Cyclone FPGA. Several of these modules are joined to create 16Bytes @ 96kHz. See the former page for details of the function: Noise Generator 1
	Full Stereo Digital Processing
	96 kHz Audio DSP